The demand for data communications services of all kinds is exploding worldwide due in large part to the explosive growth of the Internet. Each year many more hosts are added while the number of users seems to be growing without limit. The Internet enables communications using different techniques including remote computer login, file transfer, world wide web browsing, email, etc.
The demand is also growing for wireless services (i.e. cellular phones, two way pagers, cordless devices, etc.) and personal computing devices such as laptops, PDAs, etc. Many of these personal computing devices incorporate wireless communications circuitry to enable them to communicate via wireless networks (e.g., cellular or other broadband schemes) to WAN networks such as the Internet.
Many such wired and wireless products are adapted to receive and transmit serial data streams. It is common practice to send the serial data without a separate clock signal. It is thus the function of the receiver to extract the timing from the received data. There exist numerous prior art analog and digital based synchronization techniques for recovering the clock from received data in both wired and wireless type receivers. Typically, synchronization mechanisms having very high timing accuracy and fast acquisition are very complex and expensive.
There is constant pressure on manufacturers to reduce the cost of their communications products. One way of reducing the cost is to develop cheaper and simpler circuits to incorporate in products. Simple and low cost mechanisms for clock recovery are usually based on the detection of transitions in the received data signal. Such mechanisms, however, are sensitive to the noise and jitter that are commonly present in communications systems.
There is thus a need for a clock recovery mechanism that is capable of extracting the clock timing from a received serial data stream that is low cost and simple to implement and that exhibits reduced sensitivity to noise and jitter.